The CD4027 is a Dual JK Flip Flop CMOS IC. It consists of two identical complementary-symmetry J-K master/slave flip-flops. Each flip-flop has its individual J, K, Set Reset, and Clock input signals, and buffered Q and Q signals are provided as outputs. The IC has an operating Voltage range from 3.0V to 15V and consumes about 50nW typically. Application areas include EEPROM circuits as a memory element, to building a shift register or latching circuits.
 
Features of CD4027 -Dual JK Flip Flop IC
Wide supply voltage range: 3.0V to 15V
Low power: 50nW (typ.)
Medium speed operation: 12 MHz (typ.) with 10V supply
Set-Reset Capability
Static Flip-Flop Operation - Retains State Indefinitely with Clock Level Either “High” or “Low”
Maximum Input Current of 1µA at 18V
Operating Temperature: -55 to 125 °C
Lead Temperature (Soldering): 265° C
DIMENSIONS = Length: ~19.3 mm (0.76 in) Width: ~6.35 mm (0.25 in) Height: ~4.5 mm (0.18 in)
 
Additional Resources
CD4027 -Dual JK Flip Flop IC datasheet
 
Package Contents
1× CD4027 Dual JK Flip Flop IC